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<title>Великобританія</title>
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<dc:date>2026-04-14T13:07:06Z</dc:date>
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<item rdf:about="https://ir.lib.vntu.edu.ua//handle/123456789/9466">
<title>Improvements In or Relating to Devices for Reducing Irrational Base Codes to Minimal Form</title>
<link>https://ir.lib.vntu.edu.ua//handle/123456789/9466</link>
<description>Improvements In or Relating to Devices for Reducing Irrational Base Codes to Minimal Form
Stakhov, Alexei P.; Kozak, Andrei A.; Solyanichenko, Nikolai A.; Kuzmin, Ivan V.; Azarov, Alexei D.; Стахов, Олексій Петрович; Козак, Андрій Валентинович; Соляніченко, Микола Олександрович; Кузьмін, Іван Васильович; Азаров, Олексій Дмитрович; Стахов, Алексей Петрович; Козак, Андрей Андреевич; Соляниченко, Николай Александрович; Кузьмин, Иван Васильевич; Азаров, Алексей Дмитриевич
A device for reducing irrational- base codes, such as the Fibonacci p- code and the "golden" p-proportion code, to a minimal form comprises n substantially identical functional cells 1 equal in a number to that of code digits, whereof each I-th functional cell comprises a flip-flop 8, and a convolution AND gate 10 having one of its inputs connected to an inverting output 9 of the flip-flop. A set input 2, a reset input 6, and a count input are provided for the flip-flops. The remaining input of the I-th convolution AND gate 10 are a first convolution signal input 4 from cell I-1 and a second convolution signal input 5 from cell I-p-1. The count signal input of the I-th functional cell is connected to the information output 3 of the (I-1)-th functional cell. The convolution signal output of the I-th functional cell is connected to the reset input 6 of the (I-1)-th functional cell.; The device changes the states of the I-th and (I-1)th, (I-p-1)-th flip flops sequentially, thereby avoiding switching ambiguities.
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<dc:date>1980-12-31T00:00:00Z</dc:date>
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<title>Analog-to-digital converter</title>
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<description>Analog-to-digital converter
Stakhov, Alexei P.; Azarov, Alexei D.; Luzhetsky, Vladimir A.; Стахов, Олексій Петрович; Азаров, Олексій Дмитрович; Лужецький, Володимир Андрійович; Стахов, Алексей Петрович; Азаров, Алексей Дмитриевич; Лужецкий, Владимир Андреевич
An analog-to-digital converter comprises amplifiers, an analog switch connected with its inputs to the amplifiers and a multistage comparison unit receiving at its input the output signal from the switch. The converter further comprises a serial code translator ensuring the translation of the parallel code coming from the unit into a sequence of pulses sent to the input of a digital switch. The converter is provided with a reversible counter and a counter, the inputs of both counters being connected to the commutator; The output signal from the counter  is sent to a code rollout-rollin unit and to a code analyzing unit which is connected through a register to a scanning mode determining unit, the output signal from the unit  coming to the unit and to an analog-to-digital converter connected with its output to the input of the first amplifier (2&lt;u1&gt;u). A control unit presets a working algorithm of the said converter, so that in the course of direct conversion mode the process of conversion of the input analog value into a n-bits p-code takes place after K cycles, whereas in the course of metrological control mode bit numbers are determined, the deviation of metrological characteristics of which exceed admitted values.
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<dc:date>1982-07-28T00:00:00Z</dc:date>
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<title>Converter for converting P-codes into analog values</title>
<link>https://ir.lib.vntu.edu.ua//handle/123456789/9449</link>
<description>Converter for converting P-codes into analog values
Stakhov, Alexei P.; Azarov, Alexei D.; Moiseev, Vyacheslav I.; Uzhvak, Yury N.; Vekhovoi, Viktor P.; Стахов, Олексій Петрович; Азаров, Олексій Дмитрович; Стахов, Алексей Петрович; Азаров, Алексей Дмитриевич; Моисеев, Вячеслав И.; Верховой, Виктор П.
A converter of P-codes into analog values comprises key elements and an adder of standard analog values, the output of which is the output of the converter. The converter is provided with a code sweep unit, a unit for differential discrimination in the levels of the output signal, a unit for storage of defective bit numbers and a unit for identifying the type of sweeping. The converter further comprises a control unit ensuring the required interaction of said units during a prescribed mode of action. Said units are interconnected so as to determine the defective bit numbers with a "precision" of up to one bit.
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<dc:date>1982-07-07T00:00:00Z</dc:date>
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