Розробка апаратної платформи для реалізації SHA-алгоритмів на FPGA

Abstract

The purpose of the master's qualification work is the design and technological design of the hardware platform for the implementation of SHA-algorithms on the FPGA, with the aim of further manufacturing. Research methods - the use of modern CAD, comparative analysis, the use of existing databases to create the design of the device. The result of the development is part of the technical documentation required for the manufacture and operation of measuring instruments. The master's qualification work provides the necessary material to confirm the relevance of the development, provides the principle of operation with coverage of scientific novelty, calculated the basic electrical, structural and technological characteristics of the product, as well as electromagnetic compatibility and protection. The substantiation of the general design decision, the substantiation of a choice of accessories and materials is resulted. The technology of PCB manufacturing and the order of assembly of the device are described. Feasibility study of development expediency is carried out. The economic effect of the development and implementation of the device is calculated. The issues of life safety during the manufacture of the device and the stability of its operation under the action of electromagnetic pulse and ionizing radiation are considered. The technology of PCB manufacturing and the order of assembly of the device are described. Feasibility study of development expediency is carried out. The economic effect of the development and implementation of the device is calculated. The issues of life safety during the manufacture of the device and the stability of its operation under the action of electromagnetic pulse and ionizing radiation are considered. In general, the planned research work on conducting research on the development of a hardware platform for the implementation of SHA-algorithms on the FPGA requires a monetary investment to perform within 334495.59 UAH. The obtained research results have a high level of scientific significance (within 0.70), which indicates the feasibility of development and the importance of research work on research to develop a hardware platform for the implementation of SHA-algorithms on FPGA.