Мікропроцесорний ємнісний рівнемір

Abstract

In this thesis project developed microprocessor capacitive level gauge. The analysis of the literature, the expediency of the new development, and the analysis of existing solutions with a choice of the best option. The block diagram and analysis, and was justified technical problem that occurred today. Also analyzed existing solutions and developed their own versions of solutions and analyzed them. It was also developed electrical and functional electrical schematic diagram of microprocessor capacitive level gauges. Electrical calculations were conducted. It was designed ADC quantization error, which is 0.0048, and the average - standard deviation quantization error, which is 0.0013. It was also developed software. And economic calculation conducted part.