Багаторозрядні АЦП слідкувального типу з ваговою надлишковістю, що самокалібруються

Abstract

The paper analyzes the approaches to the structural and functional organization and design of the ana-log and digital parts of the multi-bit self-calibrating tracking ADC with weight redundancy. An approach to the construction of a DAC with weight redundancy on the base of several binary DACs is proposed. The model of a self-calibrating multi-bit tracking ADC with weight redundancy has been evaluated. The thesis that the use of a self-calibration in such an ADC reduces the conversion errors to the level of the LSBs has been proved.