Сортувальна нейромережа

Abstract

The proposed neuron network for sorting data contains two computing units and a unit for adjusting the network. The second inputs of the first computing unit are used for inputting initial values, and the outputs are connected to the inputs of the second computing unit that are used for inputting the elements of the substitution vector. The information inputs of the second computing unit are connected to the inputs for initial values, and the information outputs are used for outputting the elements of the sorted data vector. The unit for adjusting the network contains a code selector and a response analyzer. The information inputs of the code selector are connected to the inputs for initial values, and the outputs are connected to the information inputs of the response analyzer. The outputs of the response analyzer are connected to the first inputs of the first computing unit. The first computing unit contains a switching unit and a memory unit for storing rank data. The outputs of the first computing unit are connected to the address input of the switching unit and the address inputs of the code selector of the unit for adjusting the network. The information inputs of the switching unit and the memory unit are used accordingly as the first and the second inputs of the first computing unit. The outputs of the switching unit are connected to the corresponding inputs of the memory unit. The unit for resetting the units of the network is connected to the corresponding inputs of the memory unit of the first computing unit and the response analyzer of the unit for adjusting the network. The response analyzer contains an output for the signal that indicates the end of an operation and connected to the input of the second computing unit that is designed for inputting the read enable signal.