Квазілінійна математична модель помножувача частоти на основі біполярної транзисторної структури з від'ємним опором

Abstract

In this work it is proposed a quasi-linear mathematical model of an analog signal frequency multiplier on a base of bipolar transistor structure with negative resistance. The quasi-linear mathematical model is developed on a base of power approximation of U/I characteristics of the bipolar transistor structure and a quasi-linear substitution circuit in frequency doubling and tripling modes.