Імітансний логічний елемент "І"

Abstract

An immitance logic element “AND” comprises a limiting resistor, three blocking capacitors, two input terminals, an output terminal, a power distribution bus; two bipolar transistors, two resistors, the common bus are introduced, to the common bus collectors of the first and second bipolar transistors, the first lead of first resistor and first output of second resistor are connected; the base of first bipolar transistor is connected to the second output of first resistor and first output of second blocking capacitor, the emitter of first bipolar transistor is connected to the emitter of second bipolar transistor, the first output of limiting resistor and first output of first blocking capacitor, the second output of limiting resistor is connected to the power distribution bus; the second output of first blocking capacitor is connected to the output terminal; the second output of second blocking capacitor is connected to the first input terminal; the base of second bipolar transistor is connected to the second output of second resistor and first output of third blocking capacitor, the second output thereof is connected to the second input terminal.